FRS Reference Design for Cyclone V SoC Now Available
Flexibilis Redundant Switch (FRS) reference design is now available for Altera Cyclone V SoC. In Cyclone V SoC, the HSR/PRP Supervision protocol is integrated on one ARM Cortex-A9 MPCore processor running Linux. The implementation includes a graphic user interface that can be used to monitor the traffic and other nodes.
With the reference design, it is possible to evaluate and develop the SoC solution for your own system. Please download the reference design from the downloads page.
